The Arm Cortex-M family includes relatively inexpensive solutions focused on minimal power consumption. SoCs based on such cores usually underlie various embedded systems and IoT class devices. However, developments from the world of “large” Cortex-A are also penetrating this segment: back in February 2020, the company announced the Cortex-M55 (ARMv8.1-M) series, but now it is giving way to a new leader – Cortex-M85 .
For its class, this is indeed a unique processor core in many respects. In integer computing, it is ahead of the Cortex-M7 with its six-stage superscalar pipeline, and when working with Helium vector extensions, which debuted in the Cortex-M55 , it is faster than the latter. The novelty is intended for devices that require a sufficiently high level of performance, but at the same time features such as deterministic behavior and low latency during interrupt processing.
The new core is built on the same instruction set, ARMv8.1-M, but has a seven-stage integer block pipeline, optional FPUs with FP16/32/64 support, and Helium vector extensions (M-profile) . An additional 64-bit interface allows the kernel to work with custom accelerators (up to 8) and instructions. 32-bit DSP/SIMD extensions are available. First-level data and instruction caches are up to 64 KB each, and higher-level caches can be as large as 16 MB.
The MPU memory protection module is optionally supported – up to 16 isolated regions with different levels of security in the presence of TrustZone. The integrated NVIC (Nested Vectored Interrupt Controller) interrupt controller supports up to 480 interrupts as well as NMI. Separately, a wake-up controller is implemented to quickly exit the processor from sleep modes.
The Cortex-M85 has advanced debugging tools, including a performance monitor and optional trace blocks. Arm TrustZone and extensions (Pointer Authentication, Branch Target Identification) are responsible for security, so that the new core meets the requirements of PSA Certified Level 2. The core communicates with the outside world through three buses – the main 64-bit AMBA 5 AXI, compatible with the AXI4 version and two tires AMBA 5 AHB, one of which is used for peripherals.
It is currently the fastest Arm-core in the M-family, rated at 6.28 CoreMark/MHz and 8.76DMIPS/MHz. It is available as part of the Corstone-310 and Ethos-U55 reference platforms. Solutions based on new products can be developed now using Arm Virtual Hardware , since ready-made chips with new cores are likely to appear no earlier than in a year. You can learn more about the new product from the announcement and in the section of the Arm website for developers .
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